1. Isaacson, D. Process and apparatus for distinguishing conductivities by electric current computed tomography. United States Patent #4,920,490, April 24, 1990.



2. Gisser, D.G., J.C. Newell, D. Isaacson and J.C. Goble. Current patterns for impedance tomography. United States Patent #5,272,624 Dec. 21, 1993.



3. Goble, J.C., D. Isaacson and M. Cheney. Three-dimensional impedance imaging processes. U.S. Patent #5,284,142 Feb. 8, 1994.



4. Isaacson, D. and M. Cheney. Three-dimensional impedance imaging process. U.S. Patent #5,351,697 Oct. 4, 1994.



5. Isaacson, D., J.C. Newell and D.G. Gisser. Current patterns for electrical impedance tomography. U.S. Patent #5,381,333 Jan 10, 1995.



6. Cheney, M., D. Isaacson, E.L. Isaacson and E. Somersalo. Layer stripping for impedance imaging. U.S. Patent #5,390,110 Feb. 14, 1995.



7. Saulnier, G. J., D. G. Gisser, J. C. Newell, R.D. Cook, J.C. Goble and D. Isaacson. High-speed electric tomography. U.S. Patent #5,544,662 Aug 13, 1996.



8. D. Isaacson. and M. Cheney. Process for producing optimal current patterns for electrical impedance tomography U.S. Patent #5,588,429 Dec. 31 , 1996.

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