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Focus
Center, New York: Rensselaer - Task
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Key Challenges:
- Compatibility of 3D processes to present and future semiconductor processing and design protocols;
- Wafer-level precision alignment, robust wafer bonding, damage-free wafer thinning and high-density inter-wafer interconnectivity;
- Thermal-mechanical stress and thermal dissipation issues and constraints;
- 3D circuit design and performance evaluations.
3D Hyper-Integration Technology Platforms:
Rensselaer's three main technology platforms include:
- Via-last platform with wafer bonding with dielectric adhesive and copper damascene inter-wafer Interconnect;
- Via-first platform with bonding of damascene-patterned metal/adhesive redistribution layers;
- Optical inter-wafer interconnect platform with beam
via and vertical cavity.
Current Research
Current research focuses on three main areas, each with three separate subtasks:
3D technology platform processes
- wafer alignment and bonding
- via-first wafer bonding of damascene-patterned metal/adhesive redistribution layers
- low-temperature titanium-based bonding
Novel technology applications and thermomechanical stresses
- exploratory 3D integration technologies (nano-rod wafer bonding, metal contact to carbon-nano-tube, spintronics)
- optical coupling using 3D interconnect multilayers
- thermomechanical stress modeling and 3D design rules
3D-based design
- memory-intensive processors in 2D compared to 3D
- next-generation transceivers for wireless communications
- monolithic DC-DC converter for processor 3D integration
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