A. Books, Monographs

  1. T.P. Chow, A.N. Saxena, L.M. Ephrath and R.S. Bennett, "Plasma Etching of Refractory Gates of Metals, Silicides and Nitrides," in Materials Processing - Theory and Practices, Series Ed. F.F.Y. Wang, Vol. 4, Dry Etching for Microelectronics, Vol. Ed. R.A. Powell, North-Holland Physics Publishing, Elsevier Science Publishers B.V., Amsterdam, the Netherlands, 1984, Chap. 2, pp.39-77.
  2. T.P. Chow, "Advanced Device Structures Fabricated with Anisotropic Dry Etching," in VLSI Electronics Microstructure Science, Series Ed. N.G. Einspruch, Vol. 8, Plasma Processing for VLSI, Vol. Ed. D.M. Brown, Academic Press, New York, NY, 1984, Chapter 15, pp.487-508.
  3. T.P. Chow and A. J. Steckl, "A Critique of Refractory Gate Applications for MOS VLSI," in VLSI Electronics Microstructure Science, Series Ed. N.G. Einspruch, Vol. 9, Plasma Processing for VLSI, Academic Press, New York, NY, 1985, Chapter 2, pp.37-91.
  4. T.P. Chow, "Silicon Carbide Power Devices," Handbook of Thin Film Devices, edited by Ma urice H. Francombe, Vol. 1: Hetero-Structures for High Performance Devices, Academic Press, New York, NY, 2000, Chapter 7, pp.249-298.
B. Journal Articles

1. In refereed journals

(a) Major articles

  1. Machlin, E.S., Chow, T.P., and Phillips, J.C., "Structural Stability of Suboctet Simple Binary Compounds," Physical Review Letters, 38, 1292-1294 (1977).
  2. Machlin, E.S. and Chow, T.P., "Correlation Between TC and a Calculated Force Constant in Homologous Crystal Structures," Journal of Low Temperature Physics, 31, 699-718 (1978).
  3. Chow, T.P. and Steckl, A.J., "Size Effects in MoSi2-Gate MOSFET's," Applied Physics Letters, 36, 297-299 (1980).
  4. Chow, T.P. and Steckl, A.J., "Plasma Etching Characteristics of Sputtered MoSi2 Films," Applied Physics Letters, 37, 466-468 (1980).
  5. Chow, T.P., Brown, D.M., Steckl, A.J., and Garfinkel, M., "Silane Silicidation of Mo Thin Films," Journal of Applied Physics, 51, 5981-5985 (1980).
  6. Chiang, S.W., Chow, T.P., Reihl, R.F., and Wang, K.L., "The Efffect of Phosphorus Ion Implantation on Molybdenum/Silicon Contacts," Journal of Applied Physics, 52, 4027-4032 (1981).
  7. Chow, T.P., Steckl, A.J., and Brown, D.M., "The Effect of Annealing on the Properties of Silicidized Molybdenum Thin Films," Journal of Applied Physics, 52, 6331-6336 (1981).
  8. Okazaki, S., Chow, T.P., and Steckl, A.J., "Edge-Defined Patterning of Hyperfine Refractory Metal Silicide MOS Structures," IEEE Transactions on Electron Devices, ED-28, 1364-1368 (1981).
  9. Chow, T.P., Steckl, A.J., and Jerdonek, R.T., "Refractory MoSi2 and MoSi2/Polysilicon Bulk CMOS Circuits," IEEE Electron Device Letters, EDL-3, 37-40 (1982).
  10. Chow, T.P., Ghezzo, M., and Baliga, B.J., "Antimony-Doped Tin Oxide Films Deposited by the Oxidation of Tetramethyltin and Trimethylantimony," Journal of the Electrochemical Society, 129, 1040-1045 (1982).
  11. Chow, T.P. and Steckl, A.J., "Plasma Etching of Sputtered Mo and MoSi2 Thin Films in NF3 Gas Mixtures," Journal of Applied Physics, 53, 5531-5540 (1982).
  12. Rude, C.D., Chow T.P., and Steckl, A.J., "Characterization of NbSi2 Thin Films," Journal of Applied Physics, 53, 5703-5709 (1982).
  13. Korman, C.S., Chow, T.P., and Bower, D.H., "Etching Characteristics of Polysilicon, SiO2 and MoSi2 in NF3 and SF6 Plasmas," Solid State Technology, 26, No. 1, 115-124, Jan., 1983.
  14. Chow, T.P., Grant, C.S., Katz, W., Gildenblat, G., and Reihl, R.F., "The Effect of Implantation of Phosphorus into Sputtered MoSi2 Thin Films," Journal of the Electrochemical Society, 130, 933-938 (1983).
  15. Chow, T.P., Bower, D.H., Van Art, R.L., and Katz, W., "Properties of Sputtered Molybdenum Silicide Thin Films," Journal of the Electrochemical Society, 130, 952-956 (1983).
  16. Ashok, S., Chow, T.P., and Baliga, B.J., "Modification of Schottky Barriers in Silicon by Reactive Ion Etching with NF3," Applied Physics Letters, 42, 687-689 (1983).
  17. Chow, T.P., Hamzeh, K., and Steckl, A.J., "Thermal Oxidation of Niobium Silicide Thin Films," Journal of Applied Physics, 54, 2716-2719 (1983).
  18. Chow, T.P. and Steckl, A.J., "Refractory Metal Silicides: Thin-Film Properties and Processing Technology," IEEE Transactions on Electron Devices, ED-30, 1480-1497 (1983).
  19. Chow, T.P., Ashok, S., Baliga, B.J., and Katz, W., "Modification of Schottky Barriers in Silicon by Reactive Ion Etching in NF3 Gas Mixtures," Journal of the Electrochemical Society, 131, 156-160 (1984).
  20. Lu, W.-J., Chow, T.P., Steckl, A.J., and Katz, W., "Thermal Oxidation of Silicon Carbide Films," Journal of the Electrochemical Society, 131, 1907-1911 (1984).
  21. Chow, T.P. and Steckl, A.J., "Plasma Etching of Refractory Gates for VLSI Applications," Journal of the Electrochemical Society, 131, 2325-2335 (1984).
  22. Chow, T.P., Katz, W., and Smith, G., "Titanium Silicide Formation on BF2+-Implanted Silicon," Applied Physics Letters, 46, 41-43 (1985).
  23. Chow, T.P. and Baliga, B.J., "Comparison of 300-, 600-, and 1200-V n-Channel Insulated Gate Transistors," IEEE Electron Device Letters, EDL-6, 161-163 (1985).
  24. Bennett, R.S. and Chow, T.P., "Polycide Etching for VLSI Applications," Solid State Technology, 28, No. 8, 193-196 (1985).
  25. Chow, T.P., Katz, W., Goehner, R., and Smith, G.A., "Titanium Silicide Formation on Boron-Implanted Silicon," Journal of the Electrochemical Society, 132, 1914-1918 (1985).
  26. Chow, T.P. and Fanelli, G.M., "Reactive Ion Etching of MoSi2 and NbSi2 in SF6 or NF3/CCl4 or HCl Plasmas," Journal of the Electrochemical Society, 132, 1969-1973 (1985).
  27. Chow, T.P. and Baliga, B.J., "The Effect of MOS Channel Length on the Performance of Insulated Gate Transistors," IEEE Electron Device Letters, EDL-6, 413-416 (1985).
  28. Chow, T.P., Lu, W.-J., Steckl, A.J., and Baliga, B.J., "Thin Film Properties of Sputtered Niobium Silicide on SiO2 and on n+ Poly-Si," Journal of the Electrochemical Society, 133, 175-178 (1986).
  29. Lu, W.-J., Steckl, A.J., and Chow, T.P., "Electrical Characteristics of Si Devices Fabricated with Completely Consumed Carbide (C3) Dielectric Isolation Process," Journal of the Electrochemical Society, 133, 1180-1185 (1986).
  30. Pattanayak, D.N., Robinson, A.L., Chow, T.P., Adler, M.S., Baliga, B.J., and Wildi, E.J., "N-Channel Lateral Insulated Gate Transistors: Part I - Steady State Characterstics," IEEE Transactions on Electron Devices, ED-33, 1956-1963 (1986).
  31. Chow, T.P., Maciel, P.A., and Fanelli, G.M., "Reactive Ion Etching of Silicon in CCl4 and HCl Plasmas," Journal of the Electrochemical Society, 134, 1281-1286 (1987).
  32. Chow, T.P., Baliga B.J., and Pattanayak, D.N., "Counterdoping of MOS Channel (CDC) - A New Technique of Improving Suppression of Latching in Insulated Gate Bipolar Transistors," IEEE Electron Device Letters, 9, 29-31 (1988).
  33. Lin, C-M., Steckl A.J., and Chow, T.P., "Thin-layer p-n Junction Fabrication Using Ga and In Focused Ion Beam Implantation," Journal of Vacuum Science and Technology, B 6, 977-981 (1988).
  34. Lin, C-M., Steckl, A.J., and Chow, T.P., "Si p+-n Shallow Junction Fabrication Using On-Axis Ga+ Implantation," Applied Physics Letters, 52, 2049-2051 (1988).
  35. Chow, T.P., Baliga, B.J., Pattanayak, D.N., and Adler, M.S., "The Effect of Substrate Doping on the Performance of Anode-Shorted n-channel Lateral Insulated-Gate Bipolar Transistors," IEEE Electron Device Letters, 9, 450-452 (1988).
  36. Chow, T.P. and Baliga, B.J., "A New Hybrid VDMOS-LIGBT Transistor," IEEE Electron Device Letters, 9, 473-475 (1988).
  37. Lin, C.-M., Steckl, A.J., and Chow, T.P., "Electrical Properties of Ga-Implanted Si p+-n Shallow Junctions Fabricated by Low-Temperature Rapid Thermal Annealing," IEEE Electron Device Letters, 9, 594-597 (1988).
  38. Lin, C-M., Steckl, A.J., and Chow, T.P., "Sub-100-nm p+-n Shallow Junctions Fabricated by Group III Dual Ion Implantation and Rapid Thermal Annealing," Applied Physics Letters, 54, 1790-1792 (1989).
  39. Chow, T.P., Baliga, B.J., Pattanayak, D.N., and Adler, M.S., "Comparison of P-Channel Lateral Insulated-Gate Bipolar Transistors with and without Collector Shorts," IEEE Electron Device Letters, 11, 184-186 (1990).
  40. Chow, T.P., Pattanayak, D.N., Baliga, B.J., Adler, M.S., Hennessy, W., and Logan, C., "Interaction Between Monolithic, Multiple, Junction-Isolated, Lateral Insulated-Gate Bipolar Transistors," IEEE Transactions on Electron Devices, 38, 310-315 (1991).
  41. Chow, T.P. and Hopple, C., "The Effect of Oxygen Addition on Reactive-Ion-Etched Silicon Damage in CHF3 Plasmas," Journal of the Electrochemical Society, 138, 1399-1402 (1991).
  42. Chow, T.P., So, K.-C., and Lau, D., "The Performance of N-Channel IGBT's at Low Temperatures," IEEE Electron Device Letters, 12, 498-499 (1991).
  43. Chow, T.P., Baliga, B.J., Gray, P.V., Adler, M.S., Chang, M.F., Pifer, G.C., and Yilmaz, H., "A Self-Aligned Short Process for Insulated-Gate Bipolar Transistors," IEEE Transactions on Electron Devices, 39, 1317-1321 (1992).
  44. Tyagi, R. and Chow, T.P., "Schottky Barrier Modification on InP Using Shallow Implant Layer," Journal of Electronic Materials, 22, 221-227 (1993).
  45. Tyagi, R., Chow, T.P., Borrego, J.M., and Pisarczyk, K.A., "Improved Al/InP Schottky Barriers by Coimplantation of Be/P," Applied Physics Letters, 63, 651-653 (1993).
  46. Lakshminarayanan, S., Steigerwald, J., Price, D.T., Bourgeois, M., Chow, T.P., Gutmann, R.J., and Murarka, S.P., "Contact and Via Structures with Copper Interconnects Fabricated Using Dual Damascene Technology," IEEE Electron Device Letters, 15, 307-309 (1994).
  47. Chow, T.P. and Tyagi, R., "Wide Bandgap Compound Semiconductors for Superior High-Voltage Unipolar Power Devices," IEEE Transactions on Electron Devices, 41, 1481-1483 (1994).
  48. Tyagi, R., Ghezzo, M., Chow, T.P., and Norton, J.F., "An Isoplanar Isolation Technology for SiC Devices Using Local Oxidation," Journal of the Electrochemical Society, 141, 2188-2191 (1994).
  49. Bhalla, A. and Chow, T.P., "550V, N-Channel Emitter Switched Thyristors with an Atomic Lattice Layout (ALL) Geometry," IEEE Electron Device Letters, 15, 452-454 (1994).
  50. DeMeo, R., Wang, T.K., Chow, T.P., Borrego, J.M., Brown, D.M., and Matus, L.G., "Oxidation of 3C and 6H SiC in N2O," Journal of the Electrochemical Society, 141, L150-152 (1994).
  51. Bhalla, A., and Chow, T.P., "Dual Lateral Channel Emitter Switched Thyristor Characteristics: Dependence on Floating Emitter Length," IEEE Electron Device Letters, 16, 5-7 (1995).
  52. Bhalla, A. and Chow, T.P., "ESTD: An Emitter-Switched Thyristor with a Diverter," IEEE Electron Device Letters, 16, 77-79 (1995).
  53. Parthasarathy, V., Bhalla, A., and Chow, T.P., "A 550V Isolated Channel Base Resistance Controlled Thyristor," IEEE Electron Device Letters, 16, 283-285 (1995).
  54. Gutmann, R.J., Chow, T.P., Kaloyeros, A.E., Lanford, W.A., and Murarka, S.P., "Thermal Stability of On-Chip Copper Interconnect Structures," Thin Solid Films, 262, 177-186 (1995).
  55. Parthasarathy, V., So, K.C., Shen, Z., and Chow, T.P. "500V, N-Channel Atomic Lattice Layout (ALL) IGBT's with Superior Latching Immunity," IEEE Electron Device Letters, 16, 325-327 (1995).
  56. DeMeo, R. and Chow, T.P., "Thermal Oxidation Kinetics of (100) and (111) Silicon in Nitrous Oxide," Applied Physics Letters, 67, 500-502 (1995).
  57. Hu, Y.Z., Yang, G.R., Chow, T.P., and Gutmann, R.J., "Chemical-Mechanical Polishing of PECVD Nitride with Cu Metallization, " Thin Solid Films, 290-291, 453-457 (1996).
  58. Khemka, V., and Chow, T.P., "Thermal Oxidation of (100) Silicon in O2 and CO2 and its Effect on the SiO2-Si MOS Parameters," Journal of Electrochemical Society, 144, 1137-1143 (1997).
  59. Fedison, J., Chow, T.P., Lu, H., and Bhat, I.B., "Reactive Ion Etching of GaN in BCl3/N2 Plasmas," Journal of Electrochemical Society, 144, L221-L224 (1997).
  60. Hu, Y.Z., Gutmann, R.J., Chow, T.P., Bussmann, K., Cheng, S.F., and Prinz, G.A., "Chemical-Mechanical Polishing as an Enabling Technology for Giant Magnetoresistance (GMR) Devices", Thin Solid Films, December 1997.
  61. Ramungul, N., Khemka, V., Tyagi, R., Chow, T.P., Ghezzo, M., Neudeck, P.G., Kretchmer, J., Hennessy, W., and Brown, D.M., "Comparison of Aluminum- and Boron-Implanted Vertical 6H-SiC p+n Junction Diodes," Solid-State Electronics, 42, 17-22 (1998).
  62. Fedison, J.B., Chow, T.P., Lu, H., and Bhat, I.B., "Electrical Characteristics of Magnesium-Doped Gallium Nitride Junction Diodes," Applied Physics Letters, 72, 2841-2843 (1998).
  63. Hu, Y.Z., Gutmann, R.J., and Chow, T.P., "Silicon Nitride Chemical Mechanical Polishing Mechanisms," J. Electrochem. Soc., 145, 3919-3925 (1998).
  64. Khemka, V., Chow, T.P., and Gutmann, R.J., "Effect of Reactive Ion Etch-Induced Damage on the Performance of 4H-SiC Schottky Barrier Diodes," J. Electron. Materials, 27, 1128-1135 (1998).
  65. Yang, G.-R., Zhao, Y.-P., Hu, Y.Z., Gutmann, R.J., and Chow, T.P., "XPS and AFM Study of Chemical Mechanical Polishing of Silicon Nitride," Thin Solid Films, 333, 219-223 (1998).
  66. Ramungul N., Khemka, V., Zheng, Y., Patel, R., and Chow, T.P., "6H-SiC P+N Junctions Fabricated by Beryllium Implantation," IEEE Trans. Electron Devices, 46, 465-470 (1999).
  67. Ramungul N., and Chow, T.P., "Current-Controlled Negative Resistance (CCNR) in SiC P-i-N Rectifiers," IEEE Trans. Electron Devices, 46, 493-496 (1999).
  68. Chatty, K., Khmeka, V., Chow, T.P., and Gutmann, R.J., "Re-Oxidation Characteristics of Oxynitrides on 3C- and 4H-SiC," J. Electron. Mat., 28, 161-166 (1999).
  69. Khemka, V., Patel, R., Ramungul, N., Chow, T.P., Ghezzo, M., and Kretchmer, J., "Characterization of Phosphorus Implantation in 4H-SiC," J. Electron. Mat., 28, 167-174 (1999).
  70. Khemka, V., Chow, T.P., and Gutmann, R.J., "Design Considerations and Experimental Analysis for Silicon Carbide Power Rectifiers," Solid-State Electronics, 43, 1945-1962 (1999).
  71. Gupta, R.N., Min, W.G., and Chow, T.P., "A Novel Planarized Trench Sidewall Oxide-Merged PiN/Schottky (TSOX-MPS) Rectifier," Electron Device Letters, 20, 1128-1135 (1999).
  72. Khemka, V., Ananthan, V., and Chow, T.P., "A fully planarized 4H-SiC Trench MOS Barrier Schottky (TMBS) rectifier," Electron Device Letters, 27, 286-288 (2000).
  73. Chatty, K., Banerjee, S., Chow, T.P., and Gutmann, R.J., "High-voltage lateral RESURF MOSFET?s on 4H-SiC," Electron Device Letters, 27, 356-358 (2000).
  74. Gao, Y., Tang, Y., Hoshi, M., and Chow, T.P., "Improved Ohmic Contacts on n-type 4H-SiC," Solid-State Electronics, 44, 1875-1878 (2000).
  75. Chow, T.P., "Progress in SiC High-Voltage Power Switching Devices," Future Electron Devices, 11, 106-112 (2000).
  76. Tang, Y., Fedison, J.B., and Chow, T.P., "An implanted-emitter 4H-SiC bipolar transistor with high current gain," Electron Device Letters, 22, 119-120 (2001).
  77. Fedison, J.B., Ramungul, N., Chow, T.P., Ghezzo, G., and Kretchmer, J.W., "Electrical characteristics of 4.5kV implanted anode 4H-SiC PIN junction rectifiers," Electron Device Letters, 22, 130-132 (2001).
  78. Banerjee, S., Chatty, K., Chow, T.P., and Gutmann, R.J., "Improved high-voltage lateral RESURF MOSFETs in 4H-SiC," Electron Device Letters, 22, 209-211 (2001).
  79. K. Chatty, T.P. Chow, R.J. Gutmann, E. Arnold, and D. Alok, "Accumulation-layer electron mobility in n-channel 4H-SiC MOSFETs," Electron Device Letters, 22, 212-214 (2001).
  80. Y. Tang, J.B. Fedison, and T.P. Chow, "High-Voltage Implanted-Emitter 4H-SiC BJTs," Electron Device Letters, 23(1), 16-18 (2002).
  81. K. Matocha, T.P. Chow, and R.J. Gutmann, "Positive Flatband Voltage Shift in MOS Capacitors on n-Type GaN," Electron Device Letters, 23(2), 79-81 (2002).
  82. R. Singh, J.A. Cooper, M. Melloch, T.P. Chow, and J.W. Palmour, "SiC Power Schottky and PiN Diodes," IEEE Transactions on Electron Devices, 49(4), 665-672 (2002).
  83. K. Chatty, T.P. Chow, R.J. Gutmann, E. Arnold, and D. Alok, "Comparative Hall Measurements on Wet and Dry Oxidized 4H-SiC MOSFETs," J. Electronic Materials, 31(5), 356-360 (2002).
  84. A. Elasser and T.P. Chow, "Silicon Carbide Benefits and Advantages for Power Electronics Circuits and Systems," Proceeding of the IEEE, 90(6), 969-986 (2002).
  85. K. Chatty, S. Banerjee, T.P. Chow, and R.J. Gutmann, "Hystersis in Transfer Characteristics in 4H-SiC Depletion/Accumulation-Mode MOSFETs," Electron Device Letters, 23(6), 330-332 (2002).
  86. K. Mondal, R. Natarajan, and T.P. Chow, "An Integrated 500-V Power DMOSFET/Antiparallel Rectfier Device with Improved Diode Reverse Recovery Characteristics," Electron Device Letters, 23(9), 562-564 (2002).
  87. S. Banerjee, T.P. Chow, and R.J. Gutmann, "1300V 6H-SiC Lateral MOSFETs with Two RESURF Zones," Electron Device Letters, 23(10), 624-626 (2002).
2. In non-refereed journals

(a) Contributed and Refereed Conference Papers (Extended Abstract in Proceedings) -

  1. T.P. Chow, "Uniform Differentiability," Proc. S.D. Aca. Sci., vol. 53, p.130, 1974.
  2. T.P. Chow and E.F. Knapp, ?Uniform Differentiability for Functions of Several Variables," Proc. S.D. Aca. Sci., vol. 54, 1975.
  3. E.F. Knapp and T.P. Chow, "Hypoellipticity on Topological Groups," Proc. S.D. Aca. Sci., vol. 54, 1975.
  4. T.P. Chow, A.J. Steckl, M.E. Motamedi and D.M. Brown, "MoSi2-Gate MOSFET's for VLSI," IEEE IEDM, Tech. Dig., pp.458-461, IEEE Catalog Number: 79CH1504-0ED, presented at Washington, DC, Dec. 3-5, 1979.
  5. T.P. Chow and A.J. Steckl, "Plasma Etching Characteristics of Sputtered MoSi2 Films," Abstr. No. 119, Extended Abstract, vol. 80-1, pp.313-314, presented at the Electrochem. Soc. Spring Meeting, St. Louis, MO, May 11-16, 1980.
  6. T.P. Chow, A.J. Steckl and D.M. Brown, "Formation of Intermediate Silicide Phases in Silicidized Molybdenum Thin Films," Abstr. xxx, Extended Abstract, vol. 80-2, presented at the Electrochem. Soc. Fall Meeting, Hollywood, FL, Oct., 1980.
  7. T.P. Chow and A.J. Steckl, "Planar Plasma Etching of Mo and MoSi2 Using NF3," IEEE IEDM, Tech. Dig., pp.149-151, IEEE Catalog Number: 80CH1616-2, presented at Washington, DC, Dec. 8-10, 1980.
  8. T.P. Chow, M. Ghezzo, A.J. Steckl and D.M. Brown, "Silicon Nitride Passivation for Short-Channel Molybdenum-Gate Devices," Abstr. No. 296, Extended Abstract, vol. 81-1, pp.738-741, presented at Electrochem. Soc. Spring Meeting, Minneapolis, MN, May 10-15, 1981.
  9. T.P. Chow, C.S. Grant, W. Katz, G. Gildenblat and R.F. Reihl, "The Effect of Implantation of Phosphorus into Sputtered MoSi2 Thin Films," Abstr. No. 301, Extended Abstract, vol. 82-1, p.494, presented at the Electrochem. Soc. Spring Meeting, Montreal, Quebec, May, 1982.
  10. T.P. Chow and A.J. Steckl, "The Development of Refractory Gate Metallization for VLSI," Abstr. No. 220, Extended Abstract, vol. 82-2, pp.353-354, presented at the Electrochem. Soc. Fall Meeting, Detroit, MI, Oct. 17-21, 1982.
  11. E.J. Wildi, P.V. Gray, T.P. Chow, H.R. Chang and M. Cornell, "Modeling and Process Implementation of Implanted Resurf Type Devices,? IEEE IEDM, Tech. Dig., pp.268-271, IEEE Catalog Number: 82CH1504-0ED, presented at San Francisco, CA, Dec., 1982.
  12. W.-J. Lu, T.P. Chow, A.J. Steckl and W. Katz, "Thermal Oxidation of Sputtered Silicon Carbide Thin Films," Abstr. No. 86, Extended Abstract, vol. 83-1, p.133, presented at the Electrochem. Soc. Spring Meeting, San Francisco, CA, May, 1983.
  13. T.P. Chow, S. Ashok, B.J. Baliga and W. Katz, "Modification of Schottky Barriers in Silicon by Reactive Ion Etching in NF3 Gas Mixtures," Abstr. No. 175, Extended Abstract, vol. 83-1, pp.284-285, presented at the Electrochem. Soc. Spring Meeting, San Francisco, CA, May, 1983.
  14. T.P. Chow and A.J. Steckl, "A Review of Plasma Etching of Refractory Metal Silicides," Abstr. No. 202, Extended Abstract, vol. 83-1, pp.328-329, presented at the Electrochem. Soc. Spring Meeting, San Francisco, CA, May, 1983.
  15. T.P. Chow and P.A. Maciel, "Reactive Ion Etching of Silicon in CCl4 and HCl Gas Mixtures," presented at ISPC-6, Montreal, Quebec, Canada, July, 1983.
  16. T.P. Chow, W.-J. Lu, A.J. Steckl and B.J. Baliga, "Thin Film Properties of Sputtered Niobium Silicide on SiO2 and on n+ Poly-Si," Abtr. No. 287, Extended Abstract, vol. 83-2, pp.446-447, presented at the Electrochem. Soc. Fall Meeting, Washington, DC, Oct., 1983.
  17. T.P. Chow, W. Katz and R. Goehner, "Titanium Silicide Formation on Boron-Implanted Silicon," Abstr. No. 73, Extended Abstract, vol. 84-1, p.107, presented at the Electrochem. Soc. Spring Meeting, Cincinnati, OH, May, 1984.
  18. T.P. Chow and B.J. Baliga, "The Effect of Hydrogen and Helium Implantation on Silicon MOS Characteristics," Abstr. No. 115, Extended Abstract, vol. 84-1, p.172, presented at the Electrochem. Soc. Spring Meeting, Cincinnati, OH, May, 1984.
  19. T.P. Chow and G.M. Fanelli, "Reactive Ion Etching of MoSi2 and NbSi2 in SF6/HCl Plasmas," Abstr. No. 406, Extended Abstract, vol. 84-2, p.586, presented at the Electrochem. Soc. Fall Meeting, New Orleans, LA, Oct., 1984.
  20. E.J. Wildi, T.P. Chow, M.S. Adler, M.E. Cornell and G.C. Pifer, (INVITED), "New High Voltage IC Technology," IEEE IEDM, Tech. Dig., pp.262-265, IEEE Catalog Number: 84CH2099-0, presented at Washington, DC, Dec. 9-12, 1984.
  21. M.F. Chang, G.C. Pifer, H. Yilmaz, R.F. Dyer, B.J. Baliga, T.P. Chow and M.S. Adler, "Comparison of N and P Channel Insulated Gate Transistors," IEEE IEDM, Tech. Dig., pp.278-281, IEEE Catalog Number: 84CH2099-0, presented at San Francisco, CA, Dec., 1984.
  22. W.-J. Lu, A.J. Steckl and T.P. Chow, "C3," presented at the Electrochem. Soc. Spring Meeting, Toronto, Ont., Canada, May, 1985.
  23. T.P. Chow, B.J. Baliga, P.V. Gray, M.F. Chang, G.C. Pifer and H. Yilmaz, "A Self-Aligned Short Process for Insulated Gate Transistors," IEEE IEDM, Tech. Dig., pp.146-149, IEEE Catalog Number: 85CH2252-5, presented at Washington, DC, Dec. 1-4, 1985.
  24. T.P. Chow, D. Hodul and R.A. Powell, "Rapid Thermal Annealing of Sputtered Niobium Silicide Thin Films," SPIE, Los Angeles, CA, Jan., 1986.
  25. H.R. Chang and T.P. Chow, "Reactive Ion Etching of Photoresist and Polysilicon for Planarization," Abstr. No. 268, Extended Abstract, vol. 86-1, pp.393-394, presented at the Electrochem. Soc. Spring Meeting, Boston, MA, May 4-9, 1986.
  26. D.N. Pattanayak, T.P. Chow, B.J. Baliga and M.S. Adler, "Complementary LIGT's for Power IC Applications," Abstr. No. 107, Extended Abstract, vol. 87-1, p.154, presented at the Electrochem. Soc. Spring Meeting, Philadelphia, PA, May 10-15, 1987; also Proc. Symp. on High Voltage and Smart Power Devices, ed. P.W. Shackle, Proc. vol. 87-13, pp.280-289, Electrochem. Soc., May, 1987.
  27. T.P. Chow and C. Hopple, "The Effect of Oxygen Addition on RIE Silicon Damage in CHF3 Plasmas," Abstr. No. 487, Extended Abstract, vol. 87-2, p.687, presented at the Electrochem. Soc. Fall Meeting, Honolulu, HI, Oct. 18-23, 1987.
  28. H.R. Chang, J.M. Kretchmer, G.M. Fanelli, T.P. Chow, R.D. Black and C.S. Korman, "Deep Silicon Trench Formation by RIE," Abstr. 677, Extended Abstract, vol. 87-2, pp.955-956, presented at the Electrochem. Soc. Fall Meeting, Honolulu, HI, Oct. 18-23, 1987.
  29. T.P. Chow, B.J. Baliga, H.R. Chang, P.V. Gray, W. Hennessy, and C.E. Logan, "P-Channel, Vertical Insulated Gate Bipolar Transistors with Collector Short," IEEE IEDM, Tech. Dig., pp.670-673, IEEE Catalog Number: 87CH2515-5, presented at Washington, DC, Dec. 6-9, 1987.
  30. T.P. Chow, D.N. Pattanayak, B.J. Baliga and M.S. Adler, "Latching in Lateral Insulated Gate Bipolar Transistors," IEEE IEDM, Tech. Dig., IEEE Catalog Number: 87CH2515-5, pp.774-777, presented at Washington, DC, Dec. 6-9, 1987.
  31. B.J. Baliga, H.R. Chang, T.P. Chow and S. Al-Marayati, "New Cell Designs for Improved IGBT Safe-Operating-Area," IEEE IEDM, Tech. Dig., IEEE Catalog Number: 88CH2528-8, pp.809-812, presented at San Francisco, CA, Dec. 11-14, 1988.
  32. T.P. Chow, D.N. Pattanayak, B.J. Baliga, M.S. Adler, W. Hennessy and C. Logan, "Interaction between Monolithic, Multiple, Junction-Isolated, Lateral Insulated Gate Bipolar Transistors," Abstr. No. 272, Extended Abstract, vol. 87-1, pp.411-412, presented at the Electrochemical Society Spring Meeting, Los Angeles, CA, May 7-12, 1989.
  33. T.P. Chow, D.N. Pattanayak, B.J. Baliga and M.S. Adler, "Design and Characterization of High-Voltage N-Channel SINFET's and HSINFET's," Recent News Paper No. 749, J. Electrochem. Soc., vol. 136, p.297C, presented at the Electrochemical Society Spring Meeting, Los Angeles, CA, May 7-12, 1989.
  34. T.P. Chow, D.N. Pattanayak, B.J. Baliga and M.S. Adler, "Latching in N-Channel, High-Voltage Hybrid SINFET's," Paper 3.3.5, Proc. 2nd International Symp. on Power Semiconductor Devices and ICs, pp.108-115, Shinjuku, Tokyo, Japan, April 4-6, 1990.
  35. R.S. Wrathall, B.J. Baliga, K. Shenai, W. Hennessy and T.P. Chow, "Charge Controlled 80 Volt Lateral DMOSFET with Very Low Specific ON-Resistance Designed for an Integrated Power Process," IEEE IEDM, Tech. Dig., Late News Paper, IEEE Catalog Number: 90CH2865-4, IEEE, Piscataway, NJ, presented at San Francisco, CA, Dec., Dec. 9-12, 1990.
  36. Z. Shen and T.P. Chow, "An Analytical IGBT Model for Power Circuit Simulation," Paper 4.1, Proc. 3rd International Symp. on Power Semiconductor Devices and ICs, pp.79-82, IEEE Catalog Number: 91CH2987-6, IEEE, Piscataway, NJ, Baltimore, MD, April 22-24,1991.
  37. T.P. Chow, K.-C. So and D. Lau, "Operating IGBT's at Low Temperatures," Paper 10.4, Proc. 3rd International Symp. on Power Semiconductor Devices and ICs, pp.79-82, IEEE Catalog Number: 91CH2987-6, IEEE, Piscataway, NJ, Baltimore, MD, April 22-24, 1991.
  38. T.P. Chow, B.J. Baliga, S. Al-Marayati and M.S. Adler, "Design and Characterization of P-Channel VDMOS-LIGBT Transistors," MADEP, Florence, Italy, Sept. 2-4, 1991.
  39. D.M. Brown, M. Ghezzo, J. Kretchmer, T. Gorczyca, R. Saia, J. Pimbley, P. Chow, C. Neugebauer, J. Edmond, J. Palmour, and C.H. Carter, "SiC Devices for High-Temperature Control Systems," Paper 4.5, GOMAC-91, Orlando, FL, Nov. 4-7, 1991.
  40. T.K. Wang, T.P. Chow, D.M. Brown and M. Ghezzo, "Effect of Contact Resistivities and Interface Properties on the Performance of SiC Power Devices," Proc. 4th International Symposium on Power Semiconductor Devices and ICs, Tokyo, Japan, May 19-21, 1992.
  41. T. Sakai, K.-C. So, Z. Shen and T.P. Chow, "Modelling and Characterization of SIPOS Passivated, High Voltage, N- and P-Channel, Lateral RESURF Type DMOSFET's," Proc. 4th International Symposium on Power Semiconductor Devices and ICs, Tokyo, Japan, May 19-21, 1992.
  42. A. Bhalla, T.P. Chow and M.-K. Chen, "Temperature Dependence of Gummel-Poon Model Parameters from -40 < T < 185 C for Medium-Voltage, Junction-Isolated BJTs," Proc. 4th International Symposium on Power Semiconductor Devices and ICs, Tokyo, Japan, May, 19-21, 1992.
  43. V. Parthasarathy and T.P. Chow, "Optimization of 500V, P-Channel VDMOS-LIGBT Transistors," Proc. 4th International Symposium on Power Semiconductor Devices and ICs, Tokyo, Japan, May 19-21, 1992.
  44. W.G. Hawkins, C.J. Burke, T.E. Watrobski, T.A. Tellier, S. Verdonckt-Vandebroek, and T.P. Chow, "A Fully-Integrated Silicon-Based Thermal Ink Jet IC," Paper IVa7, 22nd European Solid State Device Research Conference, Leuven, Belgium, Sept. 14-17, 1992.
  45. T.P. Chow, D.N. Pattanayak, A. Mogro-Campero, B.J.Baliga, "Proton Implantation in LIGBT's," Bipolar/BiCMOS Circuits and Technology Meeting Proceedings, Paper 5.1, pp.109-112, IEEE Catalog Number: 92CH3177-3, IEEE, Piscataway, NJ, Minneapolis, MN, Oct. 7-8, 1992.
  46. T.P. Chow, Z. Shen, D.N. Pattanayak, E.J. Wildi, M.S. Adler, and B.J. Baliga, "Modelling and Analysis of Current Sensors for N-Channel, Vertical IGBT's," IEEE IEDM, Tech. Dig., pp.253-256, IEEE Catalog Number: 92CH3211-0, IEEE, Piscataway, NJ, presented at San Francisco, CA, Dec. 13-16, 1992.
  47. R. Tyagi, T.P. Chow, J.M. Borrego, and K. Pisarczyk, "Improved Al/InP Schottky Barriers by Coimplantation of Be/P," presented at the 5th International Conference on InP and Related Materials, Paris, France, April 18-21, 1993.
  48. T.P. Chow and R. Tyagi, "Wide Bandgap Compound Semiconductors for Superior High-Voltage Power Devices," Paper 4.1, Proc. International Symp. Power Semiconductor Devices and ICs, pp.84-88, IEEE Catalog Number: 93CH3314-2, IEEE, Piscataway, NJ, Monterey, CA, May 16-18, 1993.
  49. Z. Shen and T.P. Chow, "Modeling and Characterization of the Insulated Gate Bipolar Transistor (IGBT) for SPICE Simulation," Paper 7.4, Proc. 5th International Symp. Power Semiconductor Devices and ICs, pp.165-170, IEEE Catalog Number: 93CH3314-2, IEEE, Piscataway, NJ, Monterey, CA, May 16-18, 1993.
  50. D.T. Price, R.J. Gutmann, N.J. Haley, S.P. Murarka, A.N. Saxena, T.P. Chow, S. Lakshminarayanan, and A. Bhalla, "The Coupling of an N-Well CMOS Fabrication Laboratory Course with the Sematech Center of Excellence in Multilevel Metallization at Rensselaer," 10th Biennial University/Government/Industry Microelectronics Symposium, Research Triangle Park, NC, May 18-20, 1993.
  51. A. Bhalla and T.P. Chow, "Examination of Semiconductors for Bipolar Power Devices," Paper II-46, presented at the International Conference on SiC and Related Materials, Washington, DC, Nov. 1-3, 1993, Inst. Phys. Conf. Ser. No. 137, pp.621-623, 1994.
  52. R. DeMeo, T.K. Wang, T.P. Chow, J.M. Borrego, D.M. Brown, and L.G. Matus, "Oxidation of 3C and 6H SiC in N2O," Paper I-53, presented at the International Conference on SiC and Related Materials, Washington, DC, Nov. 1-3, 1993, Inst. Phys. Conf. Ser. No. 137, pp.321-323, 1994.
  53. R. Tyagi, M. Ghezzo, T.P. Chow, and J.F. Norton, "An Isoplanar Isolation Technology for SiC Devices Using Local Oxidation (LOCOS)," Paper We B12, presented at the International Conference on SiC and Related Materials, Washington, DC, Nov. 1-3, 1993, Inst. Phys. Conf. Ser. No. 137, pp.707-710, 1994.
  54. T.P. Chow, D.N. Pattanayak, B.J. Baliga, and M.S. Adler, "A Reverse-Channel, High-Voltage Lateral IGBT," Proc. 6th International Symp. on Power Semiconductor Devices and ICs, pp.57-61, IEEE Catalog Number: 94CH3377-9, Davos, Switzerland, May 31-Jun 2, 1994.
  55. V. Parthasarathy, K.C. So, Z. Shen, and T.P. Chow, "Cell Optimization for 500V N-Channel IGBTs," Proc. 6th International Symp. Power Semiconductor Devices and ICs, pp.69-74, IEEE Catalog Number: 94CH3377-9, IEEE, Piscataway, NJ, Davos, Switzerland, May 31-Jun 2, 1994.
  56. Z. Shen, K.C. So, and T.P. Chow, "Comparative Study of Integrated Current Sensors in N-Channel IGBT's," Proc. 6th International Symp. Power Semiconductor Devices and ICs, pp.75-80, IEEE Catalog Number: 94CH3377-9, Davos, Switzerland, May 31-Jun 2, 1994.
  57. A. Bhalla and T.P. Chow, "Bipolar Power Device Performance: Dependence on Materials, Lifetime and Device Ratings," Paper 6.13, Proc. 6th International Symp. Power Semiconductor Devices and ICs, pp.287-292, IEEE Catalog Number: 94CH3377-9, Davos, Switzerland, May 31-Jun 2, 1994.
  58. S. Lakshminarayanan, J. Steigerwald, D.T. Price, M. Bourgeois, T.P. Chow, R.J. Gutmann, and S.P. Murarka, "Dual Damascene Copper Metallization Process Using Chemical-Mechanical Polishing," VMIC, Library of Congress No. 89-644090, June 6-8, 1994.
  59. N. Ramungul, R. Tyagi, A. Bhalla, T.P. Chow, M. Ghezzo, N. Ishaque, J. Kretchmer, W. Hennessy and D.M. Brown, "Design of SiC MOSFET and IGBT for High-Temperature Power Electronics Applications," Workshop on High Temperature Power Electronics for Vehicles, Fort Monmouth, NJ, April 26-27, 1995.
  60. N. Ramungul, T.P. Chow, D.A. Torrey, M. Ghezzo, R.D. King, J. Kretchmer, and W. Hennessy, "Wide Bandgap Semiconductor Switches for Electric Vehicle Applications," Proc. 1st International Conf. on All Electric Combat Vehicle (AECV), pp.211-219, Haifa, Israel, May 14-17, 1995.
  61. Z. Shen, V. Parthasarathy, and T.P. Chow, "The Effect of Electron Irradiation and Proton Implantation on and a Novel Operation of IGBT Current Sensors," Proc. 7th International Symp. Power Semiconductor Devices and ICs, IEEE, Piscataway, NJ, Yokohama, Japan, 1995.
  62. A. Bhalla, K.C. So, and T.P. Chow, "RECEST - A Reverse-Channel EST," Proc. 7th International Symp. Power Semiconductor Devices and ICs, IEEE, Piscataway, NJ, Yokohama, Japan, 1995.
  63. V. Parthasarathy, A. Bhalla, and T.P. Chow, "ICBRT: An Isolated Channel Base Resistance Controlled Thyristor," Proc. 7th International Symp. Power Semiconductor Devices and ICs, IEEE, Piscataway, NJ, Yokohama, Japan, 1995.
  64. V. Parthasarathy and T.P. Chow, "Theoretical and Experimental Investigation of 500V, P- and N-Channel VDMOS-LIGBT Transistors," Proc. 7th International Symp. Power Semiconductor Devices and ICs, IEEE, Piscataway, NJ, Yokohama, Japan, 1995.
  65. S. Lakshminarayanan, J. Steigerwald, D. Price, T.P. Chow, R.J. Gutmann, and S.P. Murarka, "CMOS Devices and Multilevel Interconnections with Dual Damascene Copper Metallization," VMIC, Library of Congress No. 89-644090, Jun 27-29, 1995.
  66. N. Ramungul, V. Khemka, R. Tyagi, T.P. Chow, M. Ghezzo, P.G. Neudeck, J. Kretchmer, W. Hennessy, and D.M. Brown, "Comparison of Aluminum- and Boron-Implanted Vertical 6H-SiC p+n Junction Diodes," Proc. International Conf. on Silicon Carbide and Related Materials, Kyoto, Japan, Sept. 18-21, 1995.
  67. N. Ramungul, R. Tyagi, A. Bhalla, T.P. Chow, M. Ghezzo, J. Kretchmer, and W. Hennessy, "Design and Simulation of 6H-SiC UMOS FET and IGBT for High-Temperature Power Electronics Applications," Proc. International Conf. on Silicon Carbide and Related Materials, Kyoto, Japan, Sept. 18-21, 1995.
  68. Y.Z. Hu, T.P. Chow and R.J. Gutmann, Chemical-Mechanical Polishing of PECVD Silicon Nitride," IEEE Proceedings of CMP-MIC, pp.97-104, Santa Clara, CA, February 22-23, 1996.
  69. Y.Z. Hu, J.M. Neirynck, G.R. Yang, T.P. Chow and R.J. Gutmann, "PECVD Silicon Nitride Chemical-Mechanical Polishing", Presented at the International Conference on Metallurgical Coatings and Thin Films, San Diego, CA, April 22-26, 1996.
  70. Fedison, T.P. Chow, H. Lu, and I.B. Bhat, "Reactive Ion Etching of GaN in BCl3/N2 Plasmas," Electrochem. Soc. Spring Meeting, Los Angeles, CA, May, 1996.
  71. R. Tyagi and T.P. Chow, "Self-Enclosed vs. LOPOS-Terminated Lateral Planar p+n and n+p Junctions in 3C-SiC/Si," Proc. 8th International Symp. Power Semiconductor Devices and ICs, Maui, HI, May 20-23, 1996.
  72. R.H. Zhu and T.P. Chow, "The Effect of DMOS Cell Geometry on the Integrated Current Sensors for High-Voltage Power MOSFETs," Proc. 8th International Symp. Power Semiconductor Devices and ICs, Maui, HI, May 20-23, 1996.
  73. Y.Z. Hu, R.J. Gutmann, T.P. Chow, K. Bussmann, S.F. Cheng and G.A. Prinz, "Chemical-Mechanical Polishing as an Enabling technology for Giant Magnetoresistance (GMR) Devices", Presented at the International Conference on Metallurgical Coatings and Thin Films, San Diego, CA, April 24-27, 1997.
  74. N. Ramungul, T.P. Chow, and D.M. Brown, G. Michon, E. Downey, and J. Kretchmer, "Charge Trapping in Nitrogen Implanted 6H-SiC N+P Junctions," Proc. 9th International Symp. Power Semiconductor Devices and ICs, pp.161-164, Weimar, Germany, May 26-29, 1997.
  75. N. Ramungul, V. Khemka, T.P. Chow, M. Ghezzo, and, J. Kretchmer, "Wide Bandgap Semiconductor Power Switches for Electric Vehicle Applications," Proc. 2nd International Conf. on All Electric Combat Vehicles (AECV), Detroit, MI, June 9-12, 1997.
  76. N. Ramungul, T.P. Chow, M. Ghezzo, and, J. Kretchmer, "SiC Device Technology for High-Voltage Power Electronics Applications," Proc. 2nd International Conf. on All Electric Combat Vehicles (AECV), Detroit, MI, June 9-12, 1997.
  77. Y. Zheng, N. Ramungul, R. Patel, V. Khemka, and T.P. Chow, "Beryllium-Implanted 6H-SiC P+N Junctions," Proc. International Conference on Silicon Carbide, III-nitrides and Related Materials, Paper MoP-06, pp.71-72, August 31-September 5, 1997.
  78. E. Arnold, N. Ramungul, T.P. Chow, and M. Ghezzo, "Interface States and Field-Effect Mobility in 6H-SiC MOS Transistors," Proc. International Conference on Silicon Carbide, III-nitrides and Related Materials, Paper Tu1b-6, pp.119-120, August 31-September 5, 1997.
  79. V. Khemka, T.P. Chow, and R.J. Gutmann, "Voltage Handling Capability and Microwave Performance of a 4H-SiC Lateral MESFET - A Simulation Study," Proc. International Conference on Silicon Carbide, III-nitrides and Related Materials, Paper WeP-46, pp.437-438, August 31-September 5, 1997.
  80. K. Matocha, T.P. Chow, H. Lu, and I.B. Bhat, "Schottky Barrier Modification on n-GaN using a Shallow p-type Implant," Proc. International Conference on Silicon Carbide, III-nitrides and Related Materials, Paper WeP-60, pp.461-462, August 31-September 5, 1997.
  81. J.B. Fedison, T.P. Chow, H. Lu, and I.B. Bhat, "Electrical Characteristics of in situ Grown Lateral P+N GaN Junction Diodes on Sapphire Substrates," Proc. International Conference on Silicon Carbide, III-nitrides and Related Materials, Paper WeP-61, pp.463-464, August 31-September 5, 1997.
  82. N. Ramungul, V. Khemka, T.P. Chow, M. Ghezzo, and J. Kretchmer, "Carrier Lifetime Extraction from a 6H-SiC High-Voltage P-i-N Rectifier Reverse Recovery Waveform," Proc. International Conference on Silicon Carbide, III-nitrides and Related Materials, Paper Th2b-4, pp.510-511, August 31-September 5, 1997.
  83. R. Gupta, N. Ramungul, T.P. Chow, and D.A. Torrey, "Assessment of Impact of Wide Bandgap Semiconductor Devices on Performance of Powe Circuits and Systems," SAE Aerospace Power Systems Conference Proceedings, P-322, pp.251-255, April, 1998.
  84. N. Ramungul and T.P. Chow, "Current-Control Negative Resistance (CCNR) in SiC P-i-N Rectifiers," Proc. 10th International Symp. Power Semiconductor Devices and ICs, pp.123-126, Kyoto, Japan, May 3-6, 1998.
  85. R. Zhu and T.P. Chow, "Proton Implantation of the Power MOSFET to Improve Its Built-In Diode Reverse Recovery," Proc. 10th International Symp. Power Semiconductor Devices and ICs, pp.321-324, Kyoto, Japan, May 3-6, 1998.
  86. R. Zhu and T.P. Chow, "A Comparative Study of the Quasi-Saturation in the High-Voltage Vertical DMOS for Different Cell Geometries," Proc. 10th International Symp. Power Semiconductor Devices and ICs, pp.343-346, Kyoto, Japan, May 3-6, 1998.
  87. R. Patel, V. Khemka, N. Ramungul, T.P. Chow, M. Ghezzo, and J. Kretchmer, "Phosphorus-Implanted High-Voltage N+P 4H-SiC Junction Rectifiers," Proc. 10th International Symp. Power Semiconductor Devices and ICs, pp.387-390, Kyoto, Japan, May 3-6, 1998.
  88. K. Chatty, T.P. Chow, R.J. Gutmann, E. Arnold, and D. Alok, "Biased-Stress Induced Channel Mobility Improvement in 4H-SiC MOSFETs," Paper Y1.7, Materials Research Society Spring Meeting, San Francisco, CA, April 5-9, 1999.
  89. R.N. Gupta, W.G. Min, T.P. Chow, H.R. Chang, and C. Winterhalter, "A Planarized High-Voltage Silicon Trench Sidewall Oxide-Merged PiN/Schottky (TSOX-MPS) Rectifier," Proc. 11th International Symp. Power Semiconductor Devices and ICs, pp.117-120, Toronto, Canada, May 26-28, 1999, IEEE Catalog Number: 99CH36312.
  90. V. Khemka, R. Patel, N. Ramungul, T.P. Chow, and R.J. Gutmann, "Static and Dynamic Characteristics of a 1100V, Double-Implanted, Planar, 4H-SiC PiN Rectifier," Proc. 11th International Symp. Power Semiconductor Devices and ICs, pp.137-140, Toronto, Canada, May 26-28, 1999, IEEE Catalog Number: 99CH36312.
  91. V. Khemka, V. Ananthan, and T.P. Chow, "A 4H-SiC Trench MOS Barrier Schottkly (TMBS) Rectifier," Proc. 11th International Symp. Power Semiconductor Devices and ICs, pp.165-168, Toronto, Canada, May 26-28, 1999, IEEE Catalog Number: 99CH36312.
  92. Y. Tang, N. Ramungul, and T.P. Chow, "Design and Simulations of 5000V MOS-Gated Bipolar Transistor (MGT) on 4H-SiC," International Conference on Silicon Carbide and Related Materials, Research Triangle Park, NC, Oct. 10-15, 1999.
  93. Z. Li, J.B. Fedison, V. Khemka, N. Ramungul, T.P. Chow, M. Ghezzo, J. Kretchmer, and A. Elasser, "Al/C/B Co-Implanted High Voltage 4H-SiC PiN Junction Rectifiers," International Conference on Silicon Carbide and Related Materials, Research Triangle Park, NC, Oct. 10-15, 1999.
  94. V. Khemka, K. Chatty, T.P. Chow, and R.J. Gutmann, "Breakdown Voltage Improvement of 4H-SiC Schottky Diodes with a Thin Surface Implant," International Conference on Silicon Carbide and Related Materials, Research Triangle Park, NC, Oct. 10-15, 1999.
  95. K. Chatty, V. Khemka, T.P. Chow, and R.J. Gutmann, "Nitrogen- and Phosphorus-Implanted, High-Voltage Planar 4H-SiC Junction Rectifiers," International Conference on Silicon Carbide and Related Materials, Research Triangle Park, NC, Oct. 10-15, 1999.
  96. K. Chatty, S. Banerjee, T.P. Chow, and R.J. Gutmann, "High Voltage Lateral RESURF MOSFETs on 4H-SiC using Nitrogen or Phosphorus as Implants," International Conference on Silicon Carbide and Related Materials, Research Triangle Park, NC, Oct. 10-15, 1999.
  97. K. Matocha, T.P. Chow, and R.J. Gutmann, "Non-Contact Characterization of Recombination Processes in 4H-SiC," Paper T4.4, Materials Research Society Spring Meeting, San Francisco, CA, April 24-28, 2000.
  98. S. Banerjee, K. Chatty, T.P. Chow, and R.J. Gutmann, "Design and Implementation of RESURF MOSFETs in 4H-SiC," Paper MoP-78, Third European Conference on Silicon Carbide and Related Materials (ECSRM 2000), Kloster Banz, Germany, Sept. 3-7, 2000.
  99. J.B. Fedison and T.P. Chow, "Characteristics of Epitaxial and Implanted N-Base 4H-SiC GTO Thyristors," WeP-77, Third European Conference on Silicon Carbide and Related Materials (ECSRM 2000), Kloster Banz, Germany, Sept. 3-7, 2000.
  100. Y. Xiao, R. Natarajan, P. Jain, J. Barrett, E.J. Rymaszewski, R.J. Gutmann, and T.P. Chow, "Flip-Chip Flex-Circuit Packaging for Power Electronics," Proc. International Symposium on Power Semiconductor Devices and ICs, pp.55-58, Osaka, Japan, Jun 4-7, 2001.
  101. J.B. Fedison, T.P. Chow, M. Ghezzo, and J.W. Kretchmer, "Dependence of Turn-On and Turn-Off Characteristics on Anode/Gate Geometry of High-Voltage 4H-SiC GTO Thyristors," pp.175-178, Osaka, Japan, Jun 4-7, 2001.
  102. Y. Tang, J.B. Fedison, and T.P. Chow, "Imporvement and Analysis of Implanted-Emitter Bipolar Junction Transistors in 4H-SiC," International Conference on SiC and Related Materials, Paper MoA3-6, p.19, Tsukuba, Japan, 2001.
  103. K. Chatty, S. Banerjee, T.P. Chow, R.J. Gutmann, E. Arnold, and D. Alok, "Hall Measurements on Inversion and Accumulation-Mode 4H-SiC MOSFETs," International Conference on SiC and Related Materials, Paper MoB2-4, p.293, Tsukuba, Japan, 2001.
  104. R. Wang, I. Bhat, and T.P. Chow, "In-situ Etching of SiC Wafers in a CVD System Using Oxygen as the Source," International Conference on SiC and Related Materials, Paper WeP3-11, p.378, Tsukuba, Japan, 2001.
  105. K. Matocha, T.P. Chow, and R.J. Gutmann, "Gallium Nitride Metal-Insulator-Semiconductor Chemical Vapor Deposited Oxides," International Conference on SiC and Related Materials, Paper WeP-26, p.404, Tsukuba, Japan, 2001.
  106. L. Zhu and T.P. Chow, "Design and Processing of High-Voltage 4H-SiC Trench Junction Field-Effect Transistors," International Conference on SiC and Related Materials, Paper WeP-55, p.460, Tsukuba, Japan, 2001.
  107. K. Chatty, S. Banerjee, T.P. Chow, and R.J. Gutmann, "Hystersis in Transfer Characteristics in 4H-SiC Depletion/Accumulation-Mode MOSFETs," International Conference on SiC and Related Materials, Paper ThP-18, p.598, Tsukuba, Japan, 2001.
  108. Y. Tang, T.P. Chow, A.K. Agarwal, S.-H. Ryu, and J.W. Palmour, "Hybird MOS-Gated Bipolar Transistor Using 4H-SiC BJT," International Conference on SiC and Related Materials, Paper ThP-55, p.668, Tsukuba, Japan, 2001.
  109. K. Matocha, T.P. Chow, and R.J. Gutmann, "Gallium Nitride Power Device Design Tradeoffs," International Conference on SiC and Related Materials, Paper FrA1-3, p.685, Tsukuba, Japan, 2001.
  110. R. Wang, I. Bhat, and T.P. Chow, "Vapor Phase Epitaxial Growth of n-type SiC Using Phosphine as the Precursor," International Conference on SiC and Related Materials, Paper ThP-61, p.772, Tsukuba, Japan, 2001.
  111. A. Elasser, S. Arthur, M. Ghezzo, J. Fedison, and T.P. Chow, "Silicon Carbide Power Semiconductor Devices: An Enabling Technology for Compact High Efficient Power Electronic Converters," Proc. 4th International All Electric Compact Vehicle (AECV), Noordwijkerhout, The Netherlands, January 7-9, 2002.
  112. T.P. Chow, Y. Tang, L. Zhu, S. Banerjee and K. Chatty, "Recent Advances in SiC Power Field-Effect Transistors and Bipolar Junction Transistors," Proc. 4th International All Electric Compact Vehicle (AECV), Noordwijkerhout, The Netherlands, January 7-9, 2002.
  113. Y. Xiao, R. Natarajan, T.P. Chow, E.J. Rymaszewski, and R.J. Gutmann, "Flip-Chip Flex-Circuit Packaging for 42V/16A Integrated Power Electronics Module Applications," Proc. IEEE Applied Power Electronics Conference and Exposition (APEC), pp.21-26, Dallas, TX, March 10-14, 2002.
  114. Y. Tang, S. Banerjee, and T.P. Chow, "Hybrid All-SiC MOS-Gated Bipolar Transistor," Proc. International Symposium on Power Semiconductor Devices and ICs, pp.53-56, Sante Fe, NM, June 4-7, 2002.
  115. S. Banerjee, T.P. Chow, and R.J. Gutmann, "Robust, 1000V, 130mW -cm2, Lateral, Two-Zone RESURF MOSFETsin 6H-SiC," Proc. International Symposium on Power Semiconductor Devices and ICs, pp.69-72, Sante Fe, NM, June 4-7, 2002.
  116. R. Natarajan and T.P. Chow, "Conductivity Modulation Improvement in 6.5kV Trench UMOS Insulated Gate Bipolar Transistors," Proc. International Symposium on Power Semiconductor Devices and ICs, pp.121-124, Sante Fe, NM, June 4-7, 2002.
  117. M. Shanbhag and T.P. Chow, "Cyrogenic Operation of 4H-SiC Schottky Rectifiers," Proc. International Symposium on Power Semiconductor Devices and ICs, pp.129-132, Sante Fe, NM, June 4-7, 2002.
  118. S. Banerjee, T.P. Chow, and R.J. Gutmann, "Comparison of 1kV Lateral RESURF MOSFETs in 4H-SiC and 6H-SiC," TuP2-05, European Conference on Silicon Carbide and Related Materials (ECSCRM), Linkoping, Sweden, September 1-5, 2002.
  119. Y. Tang and T.P. Chow, "Demonstration of Monolithic Darlington Transistors in 4H-SiC," Paper WeP2-23, European Conference on Silicon Carbide and Related Materials (ECSCRM), Linkoping, Sweden, September 1-5, 2002.
  120. L. Zhu, M. Shanbhag, T. Chow, K. Jones, M. Ervin, P. Shah, M. Derenge, R. Vispute, T. Venkatesan, and A. Agarwal, "1kV 4H-SiC JBS Rectifiers Fabricated Using an AlN Capped Anneal," Paper WeP2-24, European Conference on Silicon Carbide and Related Materials (ECSCRM), Linkoping, Sweden, September 1-5, 2002.
  121. R. Wang, I. Bhat, P. Chow, "Chemical Vapor Deposition of N-type SiC Epitaxial Layers Using Phosphine and Nitrogen as the Precursors," Paper Th3-02, European Conference on Silicon Carbide and Related Materials (ECSCRM), Linkoping, Sweden, September 1-5, 2002.
(b) Contributed and Refereed Lectures (Only abstract in Proceedings) -

(1) D.M. Brown, T.P. Chow and A.J. Steckl, "A Review of Refractory Metal IC Technology - Past and Present," presented at the Custom Integrated Circuit Conference, Rochester, NY, May, 1980.

(2) T.P. Chow, D.M. Brown, A.J. Steckl and M. Garfinkel, "Silane Silicidation of Mo Films," Electronic Materials Conference, Ithaca, NY, June, 1980.

(3) S.W. Chiang, T.P. Chow, R.F. Reihl and K.L. Wang, "The Effect of Ion Implantation on Mo/Si Contacts," Electronic Materials Conference, Ithaca, NY, June, 1980.

(4) C.D. Rude, T.P. Chow and A.J. Steckl, "Characterization of NbSi2 Thin Films," Electronic Materials Conference, Santa Barbara, CA, June, 1981.

(5) T.P. Chow, K. Hamzeh and A.J. Steckl, "Thermal Oxidation of NbSi2 Thin Films," presented at the Electronic Materials Conference, Fort Collins, CO, June, 1982.

(6) S. Ashok and T.P. Chow, "Modification of Schottky Barrier in Silicon by Reactive Ion Etching," Recent News Paper No. 362, J. Electrochem. Soc., vol. 129, p. 425C, presented at the Electrochem. Soc. Fall Meeting, Detroit, MI, Oct. 17-21, 1982.

(7) T.P. Chow and B.J. Baliga, "The Effect of Channel Length and Gate Oxide Thickness on the Performance of Insulated Gate Transistors," Abstr. VIB-4, IEEE Trans. Electron Devices, vol. ED-32, p.2554, Nov. 1985; presented at the 43rd Device Research Conference, University of Colorado at Boulder, CO, June 17-19, 1985.

(8) T.P. Chow, D.N. Pattanayak, S. Al-Marayati, A.L. Robinson, B.J. Baliga, M.S. Adler and E.J. Wildi, "Performance of P-Channel Lateral Insulated Gate Transistors," Astr. IVB-4, IEEE Trans. Electron Devices, vol. ED-33, p.1854, Nov., 1986; presented at the 44th Device Research Conference, University of Massachusetts at Amherst, June 23-25, 1986.

(9) T.P. Chow, D.N. Pattanayak, B.J. Baliga and M.S. Adler, "The Effect of SIPOS on the Performance of Lateral Insulated Gate Bipolar Transistors," Abstr. IIB-2, IEEE Trans. Electron Devices, vol. ED-34, p.2359, Nov., 1987; presented at the 45th Device Research Conference, University of California at Santa Barbara, June 22-24, 1987.

(10) T.P. Chow and B.J. Baliga, "A Hybrid VIGBT-LDMOS Transistor," Abstr. VIB-1, IEEE Trans. Electron Devices, vol. 35, p.2457, Nov., 1992; presented at the 46th Device Research Conference, Boulder, CO, June 20-22, 1988.

(11) T.P. Chow, V.A.K. Temple, F.W. Holroyd, P.V. Gray and S. Al-Marayati, "MOS-Controlled Thyristor with a UMOS Turn-Off Gate," presented at the 48th Device Research Conference, Santa Barbara, CA, June 25-27, 1990.

(12) T.P. Chow, D.N. Pattanayak, E.J. Wildi, J.M. Pimbley, B.J. Baliga, and M.S. Adler, "Design of Current Sensors in IGBT's," Abstr. VIA-6, IEEE Trans. Electron Devices, vol. 39, p.2673, Nov., 1992; Device Research Conference, Boston, MA, June 22-24, 1992.

(13) W.G. Hawkins, C.J. Burke, T.E. Watrobski, T.A. Tellier, S. Verdonckt-Vandebroek, and T.P. Chow, "Power n-MOSFET Design for a 40-V 192-Element Thermal Ink Jet IC," Abstr. VIA-7, IEEE Trans. Electron Devices, vol. 39, p.2674, Nov., 1992; presented at the 50th Device Research Conference, MIT, Cambridge, MA, June 22-24, 1992.

(14) R. Tyagi and T.P. Chow, "Schottky Barrier Modification on InP Using a Shallow Implant Layer," J. Electronic Materials, vol. 22, Feb., 1993; Paper C8, presented at the Electronics Materials Conference, MIT, Cambridge, MA, June 24-26, 1992.

(15) T.P. Chow, "Interface Properties of SiC: Contact Resistivities and MOS Strcutures," Workshop on SiC Materials and Devices, Charlottesville, VA, September 10-11, 1992.

(16) T.P. Chow and R. Tyagi, "Calculations of Specific Contact Resistivity of Metals on Wide Bandgap Semiconductors," presented at the ONR Workshop on contacts on wide bandgap semiconductors, Washington, DC, May 13, 1993.

(17) S. Lakshminarayanan, J. Stiegerwald, D. Price, M. Bourgeois, T.P. Chow, R.J. Gutmann, and S.P. Murarka, "Dual Damascene Copper Metallization Process Using Chemical-Mechanical Polishing," Copper Metallization Workshop, August, 1993.

(18) A. Bhalla and T.P. Chow, "ESTD: An Emitter-Switched Thyristor with a Diverter," Device Research Conference, Boulder, CO, June 20-22, 1994.

(19) Z. Shen, V. Parthasarathy, and T.P. Chow, "Improvement of IGBT Latching Performance by Indium Doping," Device Research Conference, Charlottesville, VA, IEEE Catalog Number: 95TH8109, IEEE, Piscataway, NJ, Jun 19-21, 1995.

(20) N. Ramungul, T.P. Chow, M. Ghezzo, J. Kretchmer, and W. Hennessy, "A Fully Planarized, 6H-SiC UMOS Insulated-Gate Bipolar Transistor," 54th Device Research Conference, p.56, Paper III.A-3, Santa Barbara, CA, June 24-26, 1996.

(21) K.V. Chatty, V.K. Khemka, T.P. Chow, and R.J. Gutmann, Paper K4, "Reoxidation Characteristics of Oxynitrides on 3C- and 4H-SiC," presented at the Electronics Materials Conference, Univ. of Virginia, Charlottesville, VA, June 24-26, 1998.

(22) R.K. Patel, V.K. Khemka, T.P. Chow, M. Ghezzo, and J. Kretchmer, "Characterization of Phosphorus Implantation in 4H-SiC," Paper K8, presented at the Electronics Materials Conference, Univ. of Virginia, Charlottesville, VA, June 24-26, 1998.

(23) V.K. Khemka, T.P. Chow, and R.J. Gutmann, "The Effect of Reactive Ion Etching on Schottky Barriers on 4H-SiC Surfaces," Paper U9, presented at the Electronics Materials Conference, Univ. of Virginia, Charlottesville, VA, June 24-26, 1998.

(24) J.B. Fedison, Z. Li, N. Ramungul, T.P. Chow, M. Ghezzo, and J. Kretchmer, "4500V Planar Implanted Anode p-i-n Junction Rectifiers in 4H-SiC," Device Research Conference, June, 1999.

(25) K. Chatty, S. Banerjee, T.P. Chow, R.J. Gutmann, and M. Hoshi, "High Voltage Lateral RESURF MOSFETs," Device Research Conference, Santa Barbara, CA, June, 1999.

(26) V. Khemka, T.P. Chow, and R.J. Gutmann, "Characteristics of Nickel Schottky Junctions on Trench Sidewalls of Reactive Ion Etched 4H-SiC Surfaces," Electronics Materials Conference, Santa Barbara, CA, June, 1999.

(27) S. Banerjee, K. Chatty, T.P. Chow, and R.J. Gutmann, "Improved Implanted RESURF MOSFETs in 4H-SiC," Paper IV.A.-2, Device Research Conference, Denver, CO, June 19-21, 2000.

(28) Y. Tang, J.B. Fedison, and T.P. Chow, "An Implnated-Emitter 4H-SiC Bipolar Transistor with High Current Gain," Paper IV.A.-3, Device Research Conference, Denver, CO, June 19-21, 2000.