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| Microelectronics |
Rensselaer has been awarded a Center for Advanced Interconnect Systems Technologies (CAIST) by the Semiconductor Research Corporation (SRC) to support research in microelectronic interconnect technologies, the backbone of the next generation of computer technology. The new center will continue and advance the work of the Center for Advanced Interconnect Science and Technology created in 1996. The three-year program is valued at more than $9 million, which includes $500,000 per year from New York state. The SRC will provide $1.5 million per year, and IBM will provide a minimum of $1 million per year in cash, scholarships, and equipment. Rensselaer will provide $250,000 per year in administrative costs and technical support. Toh-Ming Lu, the Ray Palmer Baker Distinguished Professor at Rensselaer, will direct the CAIST. David Duquette, chair of materials science and engineering at Rensselaer, and Paul Ho, director of the Laboratory for Interconnect and Packaging at the University of Texas-Austin, will serve as associate directors. The CAIST will draw on the expertise of New York researchers from Rensselaer, Columbia, Rochester, Cornell, and the University at Albany. It will combine that expertise with that of researchers from Georgia Institute of Technology, University of Texas-Austin, MIT, UC Berkeley, University of Maryland, North Texas University, and Texas Tech. The CAIST will assist the nations microelectronics, telecommunication, and supplier industries. It will determine their technological needs, identify areas of long-term technological relationship, and build partnerships that will advance economic growth here in New York state, says Rensselaer President Shirley Ann Jackson. The challenges facing the semiconductor industry in the interconnect area require the depth of experience and great expertise that Rensselaer and its partners in CAIST have built over the years, says John Kelly, senior vice president and group executive of the IBM Technology Group. CAIST research will focus on increasing the performance of interconnects on microelectronic chips through the use of advanced materials and 3-D chip stacking. Present interconnection technology is unable to keep pace with devices that can switch on or off in less than a billionth of a second. |
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| Rensselaer Magazine: June 2002 | ||||
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